The sample and hold circuit (sample/hold) is also called the sample-and-hold amplifier. When performing A/D conversion on an analog signal, a certain conversion time is required. During this conversion time, the analog signal must remain basically unchanged, so as to ensure the conversion accuracy. The sample-and-hold circuit is the circuit that realizes this function.
Under the control of the input logic level, it is in two working states of "sample" or "hold". In the "sampling" state, the output of the circuit tracks the input analog signal. In the "hold" state, the output of the circuit keeps the instantaneous input analog signal at the end of the previous sampling until it enters the next sampling state. The following figure shows the sample/hold diagram:
The most basic sample/hold device consists of an analog switch, a storage element (hold capacitor) and a buffer amplifier. As shown below:
When Vc is the sampling level, the switch s is turned on, the analog signal Vi is charged to CH through S, and the output voltage Vo tracks the change of the analog signal; when Vc is the holding level, the switch S is turned off, and the output voltage Vo remains at the analog switch off. The input signal value at the moment of opening. The function of the buffer amplifier with high input impedance is to isolate CH from the load, otherwise the charge on CH in the hold phase will be discharged through the load, and the hold function cannot be realized.
1. Tandem type
2. Feedback type
3. Capacitance correction type