In power electronics (such as drive technology), IGBTs are often used as high-voltage and high-current switches. These power transistors are controlled by voltage, and their main losses occur during switching. In order to minimize switching losses, a short switching time is required. However, fast switching also implies the danger of high-voltage transients, which may affect or even damage the processor logic. Therefore, the gate driver that provides the appropriate gate signal for the IGBT also performs the function of providing short-circuit protection and affecting the switching speed. However, certain characteristics are critical when selecting a gate driver.
During the switching period, the transistor will be in a state where both high voltage and high current are applied at the same time. According to Ohm's law, this will result in a certain loss, depending on the duration of these states (see Figure 1).
Figure 1. Simplified representation of each loss component of a transistor
The goal is to minimize these time periods. The main influencing factor here is the gate capacitance of the transistor, which must be charged/discharged in order to realize the switch. Higher transient currents will accelerate this process.
Therefore, a driver that can provide a higher gate current for a longer period of time has a more positive effect on the switching loss. For example, ADI's ADuM4135 can provide up to 4 A of current. Depending on the IGBT, this may make the switching time in a very small range of a few ns.
The decisive factors for minimizing the switching time are the output rise time (t R ), fall time (t F) and propagation delay (t D ). Propagation delay is defined as the time required for the input edge to reach the output and depends on the driver output current and output load. Propagation delay is usually accompanied by pulse width distortion (PWD), which is the difference between the rising edge delay and the falling edge delay:
Because the driver usually has multiple output channels, although the same input drive is used, it still has different response times, so a small additional offset, namely propagation delay skew (t SKEW ), is generated, as shown in Figure 2.
Figure 2. Timing behavior of gate driver with multiple outputs
Figure 3. Simple schematic diagram of a gate driver with multiple outputs
In power electronics, isolation is required for functional and safety reasons. Due to the use of a gate driver (for example, a half-bridge topology in the driving technology), it will be in contact with high bus voltages and currents, and isolation is inevitable. The functional reason is that the driving of the power stage usually occurs in the low-voltage circuit, so it is impossible to drive the high-side switch of the half-bridge topology, because when the low-side switch is turned on at the same time, its potential is higher. At the same time, isolation represents the reliable isolation of the high-voltage part from the control circuit in the event of a fault, so that human contact can be made. The dielectric strength of isolated gate drivers is usually 5 kV(rms)/min or higher.
The harsh industrial environment requires the application to have the best immunity or anti-interference to the interference source. For example, RF noise, common-mode transients, and interfering magnetic fields are key factors because they can be coupled to the gate driver and can excite the power stage, causing it to switch in undesirable times. The common-mode transient immunity (CMTI) of an isolated gate driver defines the ability to suppress common-mode transients between input and output.